Technical Field
The present invention relates to a buffer memory management method, and more particularly, to a buffer memory management method, a memory control circuit unit and a memory storage device.
Description of Related Art
The markets of digital cameras, cellular phones, and MP3 players have expanded rapidly in recent years, resulting in escalated demand for storage media by consumers. The characteristics of data non-volatility, low power consumption, and compact size make a rewritable non-volatile memory module (e.g., a flash memory) ideal to be built in the portable multi-media devices as cited above.
In general, a memory storage device using the rewritable non-volatile memory module as a storage medium is usually disposed with a buffer memory, which is configured to temporarily store program codes and data, or serve as a temporarily zone for data used when background tasks are performed by the memory storage device. For example, a controller of the memory storage device can load logical address-physical address mapping tables into the buffer memory in order to access data. When a write command for performing a write operation is received, the controller of the memory storage device updates the logical address-physical address mapping tables temporarily stored in the buffer memory. Also, when the buffer memory is temporarily stored with a large amount of the updated logical address-physical address mapping tables, the controller of the memory storage device restores the updated logical address-physical address mapping table in the buffer memory back to the rewritable non-volatile memory module. As it is possible that the updated logical address-physical address mapping tables are not temporarily stored in continuous buffer units of the buffer memory and the rewritable non-volatile memory module utilizes a physical programming unit as a minimum unit for writing; therefore, the updated logical address-physical address mapping tables must be copied to the temporary zone in the buffer memory, and then restored back to the rewritable non-volatile memory module only until the updated logical address-physical address mapping tables are collected into an equivalent size of one physical programming unit. However, this great amount of copying operations will leads to system overload and excessive restoring time, resulting in degradation for overall performance.
Moreover, while restoring the updated logical address-physical address mapping tables in the buffer memory to the rewritable non-volatile memory module, if a write command is received such that the restored logical address-physical address mapping table being restored needs to be updated again, the controller of the memory storage device temporarily suspends receiving data of the write command and execution of the write command. As a result, the prolonged wait time may cause failure to write. Accordingly, how to improve efficiency of restoring the logical address-physical address mapping tables from the buffer memory back to the rewritable non-volatile memory module and system stability are major subjects for person skilled in the art.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.